Been working with cheap RFM12B modules at work and discovered something interesting about them. A couple of things actually, the first of which is that the datasheet for the Si4420 IC it uses is much better. The main issue is that the serial data stream you get when receiving is not always aligned to the bytes you transmitted.
The SPI interface only allows you to read 8 bits at a time from the FIFO, but you can pull nFFS low and then clock bits out individually without the need for a read command. The technique I use is to start reading bits that way when the RFM12B pulls its interrupt line low until I have the complete sync pattern. At that point I know I am properly aligned and can start using the SPI bus again.
The ARSSI signal is useful. To make good measurements trigger the ADC immediately after starting an SPI read command. On the ‘scope the level looks flat during receiving, but in reality I have noticed that sometimes I get the first few bytes correctly and then the stream deteriorates into noise. Still investigating that one, there are plenty of parameters to experiment with.